A single-event upset (SEU), also called a single-event error (SEE), is a change in the state of an electronic device caused by a single tiny particle, such as an ion, electron, or photon, hitting a sensitive part of a working micro-electronic device, like a microprocessor, semiconductor memory, or power transistor. This change happens because the particle creates extra electricity in or near an important part of a logic element, such as a memory "bit." The mistake in the device's output or operation caused by this event is called an SEU or a soft error.

An SEU does not cause permanent damage to the transistors or circuits, unlike other effects such as single-event latch-up (SEL), single-event gate rupture (SEGR), or single-event burnout (SEB). These are all examples of a group of radiation-related problems in electronic devices known as single-event effects (SEEs).

History

Single-event upsets were first noticed during above-ground nuclear testing from 1954 to 1957. Scientists observed unusual problems in electronic equipment used to monitor the tests. In the 1960s, similar issues were found in space electronics, but it was hard to tell if the problems were caused by soft failures or other types of interference. In 1972, a Hughes satellite lost contact with Earth for 96 seconds before communication was restored. Scientists Dr. Edward C. Smith, Al Holman, and Dr. Dan Binder explained this event as a single-event upset (SEU). They published the first paper about SEUs in the IEEE Transactions on Nuclear Science journal in 1975. In 1978, Timothy C. May and M.H. Woods described the first evidence of soft errors caused by alpha particles in packaging materials. In 1979, James Ziegler of IBM and W. Lanford of Yale explained how sea-level cosmic rays could cause single-event upsets in electronics. That same year, the first heavy ion "single-event effects" test was conducted at Lawrence Berkeley National Laboratory's 88-Inch Cyclotron and Bevatron.

Cause

Terrestrial SEUs occur when cosmic particles strike atoms in the atmosphere, causing showers of neutrons and protons. These particles can then interact with electronic circuits. In very small semiconductor devices, this effect is noticeable in the atmosphere.

In space, high-energy ionizing particles are part of the natural background, called galactic cosmic rays (GCRs). Solar particle events and high-energy protons trapped by the Earth's magnetic field (Van Allen radiation belts) make the problem worse. The high energy of particles in space makes it difficult for spacecraft shielding to prevent SEUs or serious issues like destructive latch-up. Neutrons created by cosmic rays in the atmosphere can also have enough energy to cause SEUs in electronics on aircraft flying over the poles or at high altitudes. Small amounts of radioactive materials in chip packages can also lead to SEUs.

Testing for SEU sensitivity

The sensitivity of a device to SEU can be measured through testing by placing a test device in a stream of particles at a cyclotron or other particle accelerator. This method is helpful for predicting SER (soft error rate) in space environments but is less effective for estimating SER caused by neutrons on Earth. To find the actual rate of errors, many devices may need to be tested at various altitudes.

Another way to measure SEU tolerance is by using a radiation-shielded chamber with a known radiation source, such as Caesium-137.

When testing microprocessors for SEU, the software used to operate the device must also be checked to identify which parts of the device were affected when SEUs occurred.

SEUs and circuit design

SEUs do not break the circuits they affect, but they can cause mistakes. In microprocessors used in space, the first and second-level cache memories are often the most at risk. These caches need to be very small and fast, which means they hold little electricity. Sometimes, these caches are turned off in designs meant to survive SEUs. Another area at risk is the state machine in the microprocessor's control system, which could enter "dead" states (states with no way to exit). However, these circuits use large transistors to provide strong electric currents, making them less likely to be affected than they seem. RAM, especially static RAM (SRAM) used in cache memories, is also vulnerable. SRAM is designed with the smallest possible transistors to fit many bits in a small space. These small transistors and high density make SRAM more likely to be affected by SEUs. To reduce risks, error-correcting memory is often used along with systems that regularly check and fix errors before they become too severe.

In both digital and analog circuits, a single event can create voltage pulses (called glitches) that travel through the circuit. This is known as a single-event transient (SET). Unlike SEUs, which change memory states, SETs are different because they do not directly alter memory. If a SET causes a wrong value to be stored in a logic unit, it becomes an SEU.

Hardware issues can also occur. In some cases, a "parasitic" thyristor in CMOS designs can activate, creating a short circuit between power and ground. This is called latch-up, and without protection, it can destroy a device due to overheating. Most manufacturers design products to prevent latch-up and test them to ensure it does not happen from particle strikes. To prevent latch-up in space, materials like epitaxial substrates, silicon on insulator (SOI), or silicon on sapphire (SOS) are often used to reduce the risk.